(China (Mainland))
Product Summary
The K4S561632J-UC75 is a 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,777,216 words by 4 bits / 4 x 8,388,608 words by 8bits / 4 x 4,194,304 words by 16bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
Parametrics
Absolute maximum ratings: (1)Voltage on any pin relative to VSS, VIN, VOUT: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to VSS, VDD, VDDQ: -1.0 ~ 4.6 V; (3)Storage temperature, TSTG: -55 ~ +150 ℃; (4)Power dissipation, PD: 1 W; (5)Short circuit current, IOS: 50 mA.
Features
Features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation; (4)MRS cycle with address key programs; (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst read single-bit write operation; (7)DQM (x4,x8) & L(U)DQM (x16) for masking; (8)Auto & self refresh; (9)64ms refresh period (8K Cycle); (10)Lead-Free & Halogen-Free Package; (11)RoHS compliant.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||
|---|---|---|---|---|---|---|---|---|---|---|
 |
 K4S561632J-UC75 |
Other |
|
Data Sheet |
Negotiable |
|
||||
| Image | Part No | Mfg | Description | |
Pricing (USD) |
Quantity | ||||
|
K4S510432B |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
K4S510832B |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
K4S510832M |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
K4S511533F - Y(P)C |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
K4S511533F - Y(P)F |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
K4S511533F - Y(P)L |
Other |
|
Data Sheet |
Negotiable |
|
||||
